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In order to 3C-SiC Si handle wafer overcome the characteristic warpage of Si wafers caused by the thermal mismatch between 3C-SiC and Si, the Si handle wafer was thinned to 250 µm SiO2 grown on the SiC film using backside lapping and polishing followed by KOH etching to obtain a compliant substrate for 3C-SiC wafer bonding. The handle wafer was then thinned by mechanical lapping, then etched away in KOH 3C-SiC Si handle wafer lapped and etched leaving the exposed 3C-SiC film on the Si device wafer, but electrically isolated from the membrane 1.5 µ m by a 1.5 µm-thick SiO 2 layer.
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